This invention relates to improvements particularly applicable for use with implantable pulse generators such as cardiac pacers, nerve stimulators or fluid dispenser pumps and the like and will be described with particular reference thereto.
Although the invention will be described with particular reference to such implantable pulse generators, it is to be appreciated that the invention has applications with respect to improvements in electronic packaging suitable for other applications.
Implantable pulse generators such as cardiac pacers, nerve stimulators and fluid dispensing pumps are designed to be implanted within the human body for performing their intended function. Such generators typically include a hermetically sealed housing which contains a power supply in the form of a battery and a pulse generator circuit powered by the battery for providing pulses. The housing may, for example, be a metal case which is sealed so as to be effectively impervious with respect to either gases or liquids. Signals into and out of the circuitry are coupled through the casing by means of feedthrough terminals of various types known in the art. Examples of such a cardiac pacer may be found in the U.S. patent to A. Ushakoff U.S. Pat. No. 4,127,134, assigned to the same assignee as the present invention and in the U.S. patent to Greatbatch U.S. Pat. No. 4,135,519.
As is apparent from the above noted patents, the size of the housing is dependent upon that required to house both the battery and the electric circuit constituting the pulse generator. To a large extent, the size of the battery is dependent upon the anticipated lifetime as well as cost factors of the type of battery employed. In addition to improvements in batteries, great strides have been made in component packaging which greatly affects the size of the electric circuit employed. For example, the circuitry illustrated in the patent to Ushakoff, supra, shows discrete components as opposed to integrated circuits or chips as employed in the U.S. patent to A. F. Lesnick et al. U.S. Pat. No. 4,163,451, also assigned to the assignee herein. The Lesnick patent discloses a microprocessor based pulse generator for use as a cardiac pacer and includes integrated circuits including active chips such as microprocessors and other active circuits together with passive chips, such as chip resistors and chip capacitors. The use of such integrated circuits requires less space than discrete components and thus provides a reduction in the size necessary for the circuitry employed in such an implantable pulse generator.
It has been common in packaging such electronic circuitry to mount integrated circuits, or IC chips, as well as passive chips on a substrate or printed circuit board such that a considerable amount of the surface area was required to mount the various integrated circuits and other chips together with the interconnections from chip to chip. More recently, electronic packaging of such IC chips has included dual in-line (DIP) packaging.
Still further improvements in electronic packaging have included multi-layered ceramic carriers for housing and interconnecting one or more semiconductor integrated circuit chips such as that disclosed in the U.S. patent to Ibrahim et al. U.S. Pat. No. 4,320,438. This patent discloses a multi-layered ceramic package which is of square shape and is thin in terms of height. The upper surface has a cavity in which there is mounted a pair of IC chips with the cavity being hermetically sealed with a lid over the upper surface of the package. The IC chips have contact pads on their upper surfaces so that the chips may be interconnected to each other by way of wire bonds and wire bonding lands on one of the ceramic layers. Additionally, individual ones of the ceramic layers have metallized patterns thereon connected as by wire bonds to contact pads on the IC chips. Some of these metallized patterns extend to the peripheral edge of the package to contact edge metallizations or castellations. In some instances, the metallized patterns extend to a vertical conductive path or via which interconnects a metallized pattern on one ceramic layer with that on another ceramic layer, sometimes eventually leading to a peripheral edge metallization or castellation. The peripheral or edge castellations extend to the lowest surface of the package and connect with underlying contact pads. The underlying contact pads are located on the bottom surface adjacent the peripheral edge portion of the package. These contacts pads which serve as input-output (I/O) ports or terminals, may be connected to a mother board or a substrate on which the carrier is mounted.
In assembling the active chips and the passive chips of an implantable pulse generator such as the one disclosed in the patent to Lesnick, supra, the use of a chip carrier such as that disclosed in Ibrahim, supra, would permit the mounting of a pair of active chips in a hermetically sealed cavity of the chip carrier. While this might decrease the contact footprint required to mount the active chips, it may not improve the foot print area required for the additional components, such as chip resistors and chip capacitors which also must be interconnected with the active chips and other components to form the pulse generator.